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Current Opening |
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| | Title: Senior Analog Circuit Design Engineer (Apply Now) | | |
Responsibilities:
- Implement difficult, non-routine, complex CMOS Analog ICs from specifications to engineering prototypes with appropriate interfaces to Marketing and Manufacturing.
- Take charge of difficult Frequency Control and Timing design projects requiring a high level of design expertise to support the highest possible performance of the end product in terms of phase noise, jitter, current consumption, PVT stability and accuracy.
- Design of Analog circuits including; Circuit simulations, Layouts floor-planning and crafting, Post-Layout simulation, tape-out review, Product Characterization and testing.
- Design Analog IC in deep sub-micron CMOS and SiGe BiCMOS process using advanced libraries, tools and methods to accomplish the highest quality in the realized outputs.
- Adopt the most advanced Design Technology and Design Architecture for Analog IC products within applications.
- Participate in the technical lead of Analog IC design activity to improve product performance and reduced manufacturing costs insuring sound application of scientific principles.
Qualifications:
Education and/or Experience:
- MS or PhD in Electrical/Electronic Engineering.
- 10+ years experience in all aspects of Analog silicon product development, and tape-outs. Exposure to Frequency Control (XO, VCXO, and LC-VCOs) and Timing Markets (PLLs and Buffers) is desirable.
- Experience in designing complex Analog IC's, with successful track record in the development of high volume CMOS IC Products.
Skill, Knowledge and Abilities:
- Exceptionally skilled and knowledgeable Analog IC designer with hands-on in full custom simulation, CAD-tools and high performance analog layouts.
- Skilled in applying Scientific and Engineering principles to support the highest possible performance of the end product.
- Highly Knowledgeable in Semiconductor Physics and CMOS Manufacturing processes.
- Strong familiarity with Cadence Virtuoso platform and custom IC design flow including Custom layout parasitic extraction and post-layout simulation.
- Committed to high quality standards meeting costs and time constraints.
- Excellent problem-solving capabilities.
- Action and results oriented person with good communication skills making timely decisions.
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How to apply: |
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Email: jobs@phaselink.com
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